Not Applicable
Not Applicable
1. Field of the Invention
The present invention relates generally to apparatus and method for power amplifying radio frequency (rf) or microwave rf signals. More particularly, the present invention pertains to an rf power amplifier in which two or more field-effect devices with selectively chosen DC bias circuits and rf decoupling circuits dividingly share a supply voltage, and a single rf output, two or more rf outputs, or two or more variably phase shifted rf outputs are produced.
2. Description of the Related Art
Gallium arsenide field-effect transistors (GaAsFETs) are the primary solid state devices used for amplification of high frequency signals in the range of 3 Ghz and higher. GaAsFETs have the advantages of being readily available and relatively inexpensive. However, a major disadvantage of GaAsFETs is that the maximum operating voltage is commonly +10.0 volts dc.
For many transmitter/amplifier applications, particularly airborne applications, the dc supply voltage is 28 volts dc, plus or minus 4.0 volts dc.
Since gallium arsenide FETs have an operative voltage of +10 volts dc, the use of gallium arsenide FETs has presented a problem.
Traditionally, there have been two solutions to this problem. One is to use a linear voltage regulator. The other is to use a switching regulator.
In linear voltage regulators, the voltage is linearly regulated from the supply of 28 volts to approximately 10 volts with the power difference being dissipated in heat by the regulator. This type of regulation has the disadvantages of excessive heat and low power efficiency.
Switching regulators, on the other hand, are power converters that transfer the power of a higher voltage supply to lower voltage with increased current capacity. This type of regulation has the advantage of low heat dissipation and high power efficiency, but has the disadvantages of increased costs, space inefficiency due to large size, and the creation of a spurious signal on the rf carrier (EMI problems) due to the switching action of the regulator. A high-attenuation filter is required to suppress this spurious switching signal.
A third approach to solving the problem of disparity between the operating voltage of solid-state devices and a source voltage has been to connect the solid-state devices in series, thereby dividingly sharing the source voltage and utilizing the same current flow two or more times. This third approach was presented in IEEE Transactions on Microwave Theory and Techniques, Volume 46, Number 12, of December 1998, in an article entitled, xe2x80x9cA 44-Ghz High IP3 InP -HBT Amplifier with Practical Current Reuse Biasing.xe2x80x9d
This type of circuit solves the problem of the disparity between the operating voltage of solid-state devices and a higher supply voltage by stacking the solid-state devices in a totem pole fashion so that the source voltage is divided between the solid-state devices. Two, or more, solid-state devices are used in series for dc operation, but they are used in parallel for rf operation.
Thus, current that flows in series through the solid-state devices is used twice, or more times, in the production of the rf output. It is used once in each of two, or more, series-connected solid-state devices, thereby increasing the rf output for a given current flow, as compared to rf amplifiers connected in the conventional fashion.
However, totem-pole, voltage-dividing, or current-sharing circuits, have been used only at low rf powers, as in the above-referenced article wherein the power was in the order of 10 milliwatts. At higher rf powers, problems associated with inadequate rf decoupling have included low power efficiency, oscillation, a decrease in reliability of the circuits, and destruction of the solid-state devices.
In contrast, to the extremely low rf outputs in which the prior art has been able to utilize totem-pole circuity, the present invention has been used with great success for rf outputs up to five Watts per solid-state device. However, this is not the limit, it is believed that the principles of the present invention may be used to make totem-pole circuits practical with solid-state devices with no apparent power limit.
In totem-pole circuits, problems with rf decoupling are most severe between the solid-state devices. In the present invention, the solid-state devices preferably are FETs. That is, when using FETs, rf decoupling is the most critical with regard to a source terminal of any FET that is connected to a drain terminal of a next-lower FET. Capacitors and rf chokes are used for rf decoupling and rf isolating, but selection and design of capacitor decoupling is the most critical.
The next most critical location for rf decoupling is the source terminal of the lower FET when the source terminal of the lower FET is connected to an electrical ground through a resistor, as shown herein. However, if a negative bias voltage is used for the gate of the lower FET, and the source is connected directly to an electrical ground, this source terminal is already rf decoupled. Again, capacitors are used for rf decoupling, and selection and design of capacitor decoupling is critical.
Other critical rf decoupling problems are those associated with the supply voltage to the drain of the upper FET and bias voltages to the gates of the FETs. The use of properly designed rf chokes are sufficient to provide adequate rf decoupling in these locations.
Unless rf decoupling is provided as taught herein, reduced efficiency will certainly occur, and both instability and destruction of the solid-state current devices are likely. More particularly, if one of the solid-state current devices goes into unstable self-oscillation, it will consume more dc bias and most likely become over biased resulting in destruction of the solid-state device.
In a totem-pole configuration that uses FETs, all FETs may be destroyed if one FET fails, depending on how the first FET fails. For example, if the upper FET oscillates and consumes the dc bias, it will be over biased and will be destroyed. If, in the destruction, the drain and source short circuit, which is a common type of failure, the lower FET will be over biased, too, so that the lower FET will fail also.
In short, inadequate rf decoupling, at the very least results in very low efficiency. At the worst, and with higher likelihood at higher rf outputs, it results in destruction of the FETs and/or damage or destruction of circuits connected to the FET inputs and outputs.
In the present invention, two, or more, gallium arsenide field-effect transistors (GaAsFETs) are connected in series between positive and negative terminals of a supply voltage. Therefore, all of the series-connected FETs use the same current flow. And all of the series-connected FETs proportionally share, or dividingly share, the supply voltage between/among the FETs.
Alternately, two FETs that use less current are connected in parallel in a stack with two or more power-amplifying FETs to best utilize not only the supply voltage, but also the current required by the power-amplifying FETs.
More particularly, the FETs are stacked like a totem pole with the drain of a top, or upper, FET being operatively connected to a relatively high positive potential, a source terminal of the top FET being connected to a drain terminal of a lower FET, and a source terminal of the lower FET being connected to a lower voltage.
An rf power splitter is used to split the rf input two or more ways for the gates of the FETs. In various ones of the embodiments, an rf power combiner is connected to the drain terminals of the FETs to combine the rf outputs. Optionally, a power detector, conditioner, and an npn transistor are used in a feedback circuit to flatten the rf output with respect to frequency, voltage, temperature, and time.
The rf input, which optionally is generated by a voltage controlled oscillator (VCO), is inputted directly into the splitter, or is power amplified by a driver FET before being inputted into the splitter.
The negative gate-to-source bias for the lower FET controls current flow through all FETs, which in turn controls power amplification.
Various embodiments of the present invention control the gate-to-source bias of the lower FET in unique and useful ways, thereby providing unique and useful ways of controlling both current flow through the FETs and amplification of the rf power amplifier.
While in most of the embodiments a power combiner is used to combine the rf signals after being power amplified by the FETs, in other embodiments, the rf signals are used separately with or without variable phase shifting.
In still another embodiment, separate rf inputs, which may be at different frequencies, different levels, and different modulation types, are separately amplified, and then combined to produce both rf signals in a single rf output.
The design and selection of the dc bias, rf chokes, and rf decoupling capacitors are critical to the operation and performance of current-sharing rf amplifier circuits, particularly in high power rf applications.
Improperly designed dc bias circuits will result in a reduction of power efficiency, destruction of one or more amplifying FETs, or decrease the reliability of the solid-state devices, especially at all but the lowest rf powers.
For maximum power efficiency, rf chokes must be chosen to prevent coupling of the rf signal onto the dc power lines and to obtain maximum isolation between the series FETs, and thereby to prevent rf crosstalk.
Conventionally, rf power amplifying FETs are biased with a negative dc voltage applied to the gate terminal, a positive power supply dc voltage applied to the drain terminal, and the source terminal attached to a circuit ground. However, as shown and taught herein, preferably, the source terminal of the lower FET is connected to an electrical ground through a resistor, thereby causing the FET to self bias and eliminating the need for a negative voltage for the gate terminal.
As taught herein, selectively-chosen rf decoupling capacitor(s) that are attached to the source terminals of the FETs result in minimal rf impedance to a circuit ground, thereby achieving maximum power efficiency. That is, except for very low rf outputs, proper rf decoupling of source terminals of FETs, and similar terminals for other types of solid-state current devices, requires two things: one is that the decoupling capacitors must have self-resonant frequencies that match the output frequency, the other is that the effective series resistances (ESRs) of the decoupling capacitors must be extremely low, usually lower than is available even in porcelain capacitors. Therefore, in the present invention, two or more decoupling capacitors are paralleled, thereby reducing the ESR.
In addition, in designs in which the source terminal is the mounting flange of a packaged FET, as is common in high-power rf devices, the present invention provides a mounting technique that avoids both over heating and the resultant danger of destroying the internal junctions of the solid-state device, while maintaining electrical isolation from a circuit ground.
In a first aspect of the present invention, a method for rf power amplifying comprises: series connecting upper and lower solid-state current devices; the series connecting comprises connecting a lower-voltage terminal of the upper solid-state current device to an rf choke, and connecting the rf choke to a higher-voltage terminal of the lower solid-state current device; separately amplifying rf signals in the solid-state current devices with an rf output of the upper solid-state current device exceeding about 100 milliwatts; the separate amplifying comprises rf amplifying in the upper solid-state current device at a selected operating frequency of one gigahertz or greater; rf decoupling the solid-state current devices; the rf decoupling comprises connecting capacitors in parallel between the lower-voltage terminal and an electrical ground; and the rf decoupling further comprises making the capacitors function as paralleled capacitors.
In a second aspect of the present invention, a method for rf power amplifying comprises: series connecting upper and lower FETs; the series connecting comprises connecting a source terminal of the upper FET to an rf choke, and connecting the rf choke to a drain terminal of the lower FET; separately amplifying rf signals in the FETs with an rf output of one of the FETs exceeding about 100 milliwatts; the separate amplifying comprises rf amplifying in the upper FET at a selected operating frequency of one gigahertz or greater; rf decoupling the FETs; the rf decoupling comprises providing a capacitance between a the source terminal and an electrical ground; the rf decoupling further comprises reducing an rf effective series resistance of the capacitance to less than that of any porcelain capacitor that resonates at the selected operating frequency; and the providing and reducing comprises making two capacitors function as paralleled capacitors.
In a third aspect of the present invention, a method for rf power amplifying comprises: series connecting upper and lower solid-state current devices; said series connecting comprises connecting a lower-voltage terminal of said upper solid-state current device to an rf choke, and connecting said rf choke to a higher-voltage terminal of said lower solid-state current device; separately amplifying rf signals in said solid-state current devices with an rf output of said upper solid-state current device exceeding about 100 milliwatts; said separate amplifying comprises rf amplifying in said upper solid-state current device at a selected operating frequency of one gigahertz or greater; rf decoupling said solid-state current devices; said rf decoupling comprises providing a capacitance between said lower-voltage terminal and an electrical ground; and said rf decoupling further comprises making an rf effective series resistance of said capacitance lower than that of any porcelain capacitor that resonates at said selected operating frequency.